Re: NSA Spy Machine and DES

["Ian Farquhar" <ianf@simple.sydney.sgi.com>]

On Aug 18,  8:13pm, Jim Dixon wrote:
>In message <9408190809.ZM4528@simple.sydney.sgi.com> Ian Farquhar writes:
>>Actually, I would be surprised if the "SIMD" processors were not a huge
>>array of reprogrammable FPGA's, quite possibly Xilinx's.  The possibilities
>>of a large array of these chips, each with local memory, is quite
>>interesting.  I have personally seen an array of 64 Xilinx chips in a DEC
PeRL
>>box doing RSA, at speeds similar or better to almost all available custom
>>hardware implementations of the cipher.

>The delays in getting data on and off the chip are too large and the amount
>of space wasted in redundant functions is too great.

That is a rather sweeping statement.  Want to back this up with some facts
and figures from real FPGA implementations?  Certainly the early bit-slice
designs you mention later on did suffer from these problems, but FPGA's
bear little relationship to those rather venerable devices.

>You might prototype
>it using FPGAs, but even this is unlikely.  Why not just buy one of the
>existing SIMD processors and simulate your target system?

Because the FPGA solution is obviously less flexible, but a hell of a lot
faster than software simulation of another architecture.  In this application
speed will win every time.

> People used to build fast processors out of separate chips (bit slices).
> They don't do that any more because it's too slow and too expensive if you
> are building in volume.

But this application is NOT building in volume.  And yes, people do still
built multichip CPU's: most traditional supercomputing and mainframe vendors
for a start.  Indeed, I would be surprised if this application didn't design
it's own FPGA (for ease of interfacing with the comms network for a start),
but I'd argue that a SIMD configuration of reconfigurable FPGA arrays (ie.
a fixed array of reconfigurable arrays) would be an awesome system for
many problems that the NSA would deal with.

							Ian.