NSA Wafer Fab

[tcmay@netcom.com (Timothy C. May)]

> That the NSA contracted National Semiconductor to build a facility
> on-site has been common knowledge since 1989-90. The fab is not state
> of the art (i.e., is not 1.8 micron or better) and is believed to be

Whoops! I meant to say "0.8 micron."

For reference points, 66 MHz Pentiums are typically 0.8 micron, 90 and
100 MHz Pentiums are typically 0.6-0.65 micron, and absolute state of
the fabs are 0.4 micron (a few in Japan, a few in the U.S.--all very
large and very expensive). Intel is spending $1.3 billion (that's $1.3
thousand million to you Brits) on a 0.25 micron fab to be completed in
1996-7 in Chandler, Arizona.

If the NSA is building special-purpose cipher-crunchers (which would
not surprise any of us), they could easily buy the 1000 or 10,000 or
whatever number in the market. They would be fools to try to
manufacture state of the art microprocessors in a relatively small,
several years old, facility on the outskirts of Fort Meade.

(By cipher-crunchers, I mean DES-busters, maybe password-searchers,
but not 300-digit number factorers, a la my last post.)

The NSC fab at NSA may well be a 1 - 1.5 micron fab, considering it's
genealogy. But not much better than that, I would guess. Just as
important as the lithographic feature sizes supported is the "Class"
rating of the wafer fab (a measure of air purity in terms of particles
per unit volume).

The NSA fab is almost certainly not a Class 10 fab, and is probably
used to fab MSI and LSI components. Maybe a little bit of VLSI.

--Tim May



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