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National Security Agency markets commercial ASICs
http://techweb.cmp.com/eet/news/97/965news/national.html
National Security Agency markets commercial ASICs
By Loring Wirbel
SNOWMASS, Colo. -- On a scale unprecedented for a government
intelligence arm, the National Security Agency (NSA) is expanding its
selling of
ASICs and design services, even offering commercial semiconductor
designs for selected space-based and terrestrial applications.
Terry Brown, NSA deputy chief of microelectronics, said the customer
list will still be so specialized that the agency won't compete directly
against
developers of military ASICs and rad-hard devices. "Any customer of ours
would still require a government sponsor at some level," he said.
Nevertheless, at an IEEE conference held recently, representatives of
Harris Semiconductor and UTMC Microelectronic Systems wondered how and
why a secret government agency would compete against them.
One representative of a commercial IC house, who asked not to be
identified, said, "Whenever the government thinks it can sell products
to OEMs, it
inherently raises some problems."
The commercial efforts involve NSA's 6-inch CMOS fab, run by National
Semiconductor Corp., at NSA headquarters in Fort Meade, Md., and a
Microelectronics Research Lab run by NSA at an undisclosed Maryland
location. The agency has developed special ASICs for selected customers
ever since National helped open the fab in the late 1980s. Some, such as
the Mykotronx division of Rainbow Technologies Inc., were partners in
crypto chips, while others sought NSA expertise in radiation-hardness
for space applications.
Looking to expand that customer base, the agency has named Leland Miller
its first director of marketing for microelectronics. At the IEEE
Nuclear
and Space Radiation Effects Conference, NSA had a large trade booth
advertising the capabilities of "NSA Microelectronics."
Brown said NSA has special talent in data-path design, used in signal
and image processing but ignored by many ASIC vendors.
NSA's fab has a library of more than 100 standard cells, optimized for
CMOS feature sizes from 0.5 to 1.2 microns. The fab handles double- and
triple-metal designs and is just beginning to add non-volatile EPROM and
E2PROM cell capabilities.