x-ray freezing of bits in SRAM attack

[Anonymous <nobody@remailer.ch>]

An excerpt, followed by its context from comp.arch.fpga

I did crypto key storage/management design 
 (not classified) a few years ago. One of the scenarios we dealt with
 was an X-Ray attack on the key storage SRAM. SRAMs tend to
 harden in the state they're in when exposed to X-Rays. That is, they
 tend to prefer that state for subsequent power-on cycles. It sounds
 like a rather obscure attack (no I didn't test it ;-), but don't assume a
 powered SRAM is safe from all attacks.


On Fri, 31 Dec 1999 17:32:35, nweaver@boom.CS.Berkeley.EDU 
 (Nicholas C. Weaver) wrote:
  
 > In article <RB5b4.1138$B9.1418518@feed.centuryinter.net>,
 > Larry Edington <larryeSpam.Me.Not@centuryinter.net> wrote:
 > >I'm looking at an FPGA for project I'm working on and am
 concerned about
 > >security. CPLD's and ASIC's I'm familiar with but FPGA's are a
 new trick for
 > >me.
 > >
 > >I'm looking at Altera and Xilinx.
 > >
 > >It appears that most FPGA's are programmed with a serial
 eeprom. I'm
 > >concerned about the security the data in the eeprom. What keeps
 someone from
 > >simply copying your eeprom to duplicate your FPGA's
 programming?
 > 
 >  Nothing.  
 > 
 >  It really depends on how security paranoid you are.  If you
 > want to eliminate unsophisticated copying and all but the most
 > sophisticated copying (taking apart the chip), use an eeprom based
 > programmable device.
 > 
 >  If you REALLY want protection, use an sram based FPGA with a
 > continual battery backup, so the device is always on.  Any
 disturbance
 > to the power will erase the device.
  
 Depending on the level of security you're after, even this may 
 not be "secure" unless you can secure the physical environment that it
 will be in. I did crypto key storage/management design 
 (not classified) a few years ago. One of the scenarios we dealt with
 was an X-Ray attack on the key storage SRAM. SRAMs tend to
 harden in the state they're in when exposed to X-Rays. That is, they
 tend to prefer that state for subsequent power-on cycles. It sounds
 like a rather obscure attack (no I didn't test it ;-), but don't assume a
 powered SRAM is safe from all attacks.  
  
 > >Maybe this is a stupid question but I'm still learning about
 FPGA's. Since I
 > >will have some encryption / decryption functions in the FPGA,
 this is a big
 > >concern for me. What do you need to do to protect your design
 when using
 > >FPGA's ?
 > 
 >  I really wouldn't be paranoid about the functions.  A good
 > security system's security rests in the key/secret DATA, not in the
 > algorithm.  So I'd be paranoid about the data.  This would suggest
 an
 > always on device with battery backup.